Presentation
Multi-Agent Generative AI Pipeline for Assisting in Design Verification
DescriptionSecure Multi-Agent Generative AI Pipeline for Context-Aware Design Verification
The escalating complexity of modern System-on-Chip (SoC) designs has relegated approximately 70% of the total design cycle to functional verification. This critical phase is currently plagued by knowledge fragmentation, where engineers lose significant time manually parsing massive technical specifications (JEDEC, LPDDR, HBM), and the repetitive overhead of writing boilerplate UVM code and assertions. While Large Language Models (LLMs) offer a potential solution, public AI services present an unacceptable security risk for the leakage of proprietary RTL and confidential company data.
This presentation puts forth a novel, on-premise agentic AI pipeline designed to automate the verification lifecycle within a secure local environment. Our architecture utilizes a "Team of Experts" approach orchestrated by a central Classifier Agent that routes complex queries to specialized sub-agents for code generation, log parsing, and spec retrieval. By leveraging Retrieval-Augmented Generation (RAG) and decoupled fine-tuning, the system provides high-fidelity, context-aware assistance tailored to internal design methodologies without risking external data exposure. This modular framework significantly enhances engineering productivity, reduces time-to-market (TTM), and ensures the security of sensitive silicon IP.
The escalating complexity of modern System-on-Chip (SoC) designs has relegated approximately 70% of the total design cycle to functional verification. This critical phase is currently plagued by knowledge fragmentation, where engineers lose significant time manually parsing massive technical specifications (JEDEC, LPDDR, HBM), and the repetitive overhead of writing boilerplate UVM code and assertions. While Large Language Models (LLMs) offer a potential solution, public AI services present an unacceptable security risk for the leakage of proprietary RTL and confidential company data.
This presentation puts forth a novel, on-premise agentic AI pipeline designed to automate the verification lifecycle within a secure local environment. Our architecture utilizes a "Team of Experts" approach orchestrated by a central Classifier Agent that routes complex queries to specialized sub-agents for code generation, log parsing, and spec retrieval. By leveraging Retrieval-Augmented Generation (RAG) and decoupled fine-tuning, the system provides high-fidelity, context-aware assistance tailored to internal design methodologies without risking external data exposure. This modular framework significantly enhances engineering productivity, reduces time-to-market (TTM), and ensures the security of sensitive silicon IP.
Event Type
Engineering Poster
TimeTuesday, July 285:00pm - 6:00pm PDT
LocationDAC Pavilion, Exhibit Floor