Presentation
Free Hand Routing- Sketch to Layout
DescriptionDespite significant advances in routing automation, manual routing remains a critical and time-consuming task in modern VLSI design, particularly for small layout experiments, debugging, and structured or analog routing. This paper introduces Free Hand Routing, a new paradigm that enables designers to sketch routing topologies directly using free-form drawings, while automatically transforming these sketches into technology-correct, DRC-clean, and manufacturable layouts.
The proposed approach extracts shapes and connectivity from free-hand drawings, maps them to technology-specific width and spacing rules, and applies a connectivity-aware geometric transformation flow. This flow aligns shapes to legal routing tracks, restores connectivity using a graph-driven shape extension mechanism, and inserts vias to ensure full 3D connectivity across metal layers. The final layout is exported using a structured, tool-agnostic JSON representation, enabling seamless integration with existing physical design tool chains.
Integrated into an industrial physical design environment, the approach has been used to generate hundreds of test layouts, reducing per-case effort from hours of manual coding to seconds of intuitive sketching.
The proposed approach extracts shapes and connectivity from free-hand drawings, maps them to technology-specific width and spacing rules, and applies a connectivity-aware geometric transformation flow. This flow aligns shapes to legal routing tracks, restores connectivity using a graph-driven shape extension mechanism, and inserts vias to ensure full 3D connectivity across metal layers. The final layout is exported using a structured, tool-agnostic JSON representation, enabling seamless integration with existing physical design tool chains.
Integrated into an industrial physical design environment, the approach has been used to generate hundreds of test layouts, reducing per-case effort from hours of manual coding to seconds of intuitive sketching.
Event Type
Engineering Poster
TimeWednesday, July 293:00pm - 4:00pm PDT
LocationDAC Pavilion, Exhibit Floor