Presentation
Leveraging Liberty Modeling to Enable Validation of Critical Inter-Lane Skew and Sync Symbol Specifications for Multi-Lane High-Speed PHY Transmitter
DescriptionIn recent years, the demand for high-efficiency cameras has increased significantly in the mobile industry. There is a need to support fast and efficient signal transmission between camera devices and mobile processors. Signal transmission and processing occur across multiple layers derived from the seven layers of the OSI (Open Systems Interconnection) model. This paper focuses on the first layer, the Physical Layer, whose implementation is known as PHY. Key functions of the PHY include data transmission, signal conversion, and signal modulation. This paper addresses the use of Liberty Modeling techniques to validate critical inter-lane skew and sync symbol specifications for multi-lane high-speed PHY transmitters. This modeling enables early and accurate SoC-PHY timing checks within the existing digital flow, reducing the risk of missing validation, avoiding potential 1–2-month re-implementation cycles, and improving overall time-to-market and design robustness for high-speed SoCs. The study explains how constraints are modeled in Liberty files to ensure proper validation during timing analysis. These techniques are scalable and applicable to similar constraints in Liberty models of other multi-lane PHYs.
Event Type
Engineering Poster
TimeWednesday, July 293:00pm - 4:00pm PDT
LocationDAC Pavilion, Exhibit Floor