Presentation
Accurate Characterization Methodology for Combo-IO Design with Concurrent Switching Outputs for Precise Power Analysis at SoC
DescriptionAs semiconductor technology scales to smaller nodes, achieving area-optimized and low-power integrated circuits require advanced design architecture ‘s coupled with precise power estimation. Accurate power analysis depends on NLPM data embedded in Liberty models, which guide critical architectural trade-offs.
This paper investigates internal power modelling challenges in modern System-on-Chip designs employing Combo-IO architectures, where multiple communication standards such as GPIO, I2C, and I3C are integrated within a single physical block. The absence of dedicated control signals causes multiple receiver outputs to switch simultaneously, leading to significant inaccuracies in conventional internal energy characterization.
A comparative study of two characterization methodologies, path-based vs design-based, is presented for Combo-IO, with experiments driven by Siemens Characterizer. Liberty models generated by these methods are validated through power analysis.
Results demonstrate that path-based characterization leads to a scalable overestimation of internal power, with errors ranging from 2X to 4X for designs containing two to four active outputs. The proposed design-based methodology accurately distributes energy dissipation across concurrently switching outputs, enabling reliable power estimation for advanced low-power ICs.
This paper investigates internal power modelling challenges in modern System-on-Chip designs employing Combo-IO architectures, where multiple communication standards such as GPIO, I2C, and I3C are integrated within a single physical block. The absence of dedicated control signals causes multiple receiver outputs to switch simultaneously, leading to significant inaccuracies in conventional internal energy characterization.
A comparative study of two characterization methodologies, path-based vs design-based, is presented for Combo-IO, with experiments driven by Siemens Characterizer. Liberty models generated by these methods are validated through power analysis.
Results demonstrate that path-based characterization leads to a scalable overestimation of internal power, with errors ranging from 2X to 4X for designs containing two to four active outputs. The proposed design-based methodology accurately distributes energy dissipation across concurrently switching outputs, enabling reliable power estimation for advanced low-power ICs.
Event Type
Engineering Poster
Engineering Presentation
TimeWednesday, July 293:00pm - 3:45pm PDT
LocationDAC Pavilion, Exhibit Floor
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