Presentation
Activity Reloaded: Joules Flash Replay - A Methodology for Accurate, Delay-Based Activity Generation for Driving Optimization and Power Sign-off
DescriptionAccurate switching activity is essential for effective low‑power optimization in modern digital flows, however, activity fidelity rapidly degrades as RTL progresses through synthesis, mapping, and physical implementation. This loss of annotation forces downstream tools to depend on incomplete or vectorless estimates, diminishing the quality of power optimization. Glitch power, which can account for 20-30% of total dynamic power at advanced nodes, typically requires costly delay‑based Gate Level Simulation (GLS), resulting in prohibitive runtime and compute overhead. Conventional activity regeneration further relies on RTL or GLS teams, creating schedule bottlenecks and widening PPA gaps.
The proposed Flash Replay flow methodology eliminates these limitations by enabling rapid, on‑demand activity refresh using the Joules RTL Power tool, with minimal turnaround‑time impact on the full digital flow. It generates glitch‑aware power data significantly faster than GLS and reconstructs complete switching activity for vectorless or partially stimulated designs using lightweight seed vectors or prior RTL activity of the same design. Seamless integration with Genus and Innovus enables consistent, delay‑based activity generation throughout the RTL‑to‑signoff flow.
Results demonstrate up to 10% total power reduction when Flash Replay is incorporated into existing implementation flows, along with up to 25X speedup versus simulation‑based replay. These improvements establish Flash Replay as a practical, scalable solution for restoring activity accuracy and enhancing low‑power implementation efficiency.
The proposed Flash Replay flow methodology eliminates these limitations by enabling rapid, on‑demand activity refresh using the Joules RTL Power tool, with minimal turnaround‑time impact on the full digital flow. It generates glitch‑aware power data significantly faster than GLS and reconstructs complete switching activity for vectorless or partially stimulated designs using lightweight seed vectors or prior RTL activity of the same design. Seamless integration with Genus and Innovus enables consistent, delay‑based activity generation throughout the RTL‑to‑signoff flow.
Results demonstrate up to 10% total power reduction when Flash Replay is incorporated into existing implementation flows, along with up to 25X speedup versus simulation‑based replay. These improvements establish Flash Replay as a practical, scalable solution for restoring activity accuracy and enhancing low‑power implementation efficiency.
Event Type
Engineering Poster
TimeWednesday, July 293:00pm - 4:00pm PDT
LocationDAC Pavilion, Exhibit Floor