Presentation
ECO Strategy for BIG DIE SOC Convergence
DescriptionThe SSIR Customer Design Service (CDS) team supports projects spanning big die AI, automotive, and HPC SoCs. Schedules and designs demand static timing analysis (STA) and engineering change order (ECO) flows that close designs quickly. An ECO strategy for a large die AI SoC is difficult: the design contains about 1.6 billion instances, must meet a 1.6 GHz target, and relies heavily on multiply-instantiated-modules (MIM). MIMs complicate violation fixes because each change must be evaluated for impact on other MIMs. Additional challenges include clock path skew, extensive boundary models (BMs), and long data paths, all hindering a sustainable ECO methodology.
To address these issues, the team adopted a "divide and conquer" policy. Multiple STA models with BMs were generated for the top level, enabling parallel analysis and reducing compute load and turnaround time. The CERTUS platform, with its advanced high capacity (HC) ECO engine, prunes the netlist by identifying violations, making the flow lightweight and efficient. At the block level, Twopass and Paradigm were used as ECO tools to converge the design. SSIR worked closely with Cadence field and R&D groups to tailor the flow, creating a recipe that significantly improves fix rates while preserving timing, logical DRCs, and legalization.
To address these issues, the team adopted a "divide and conquer" policy. Multiple STA models with BMs were generated for the top level, enabling parallel analysis and reducing compute load and turnaround time. The CERTUS platform, with its advanced high capacity (HC) ECO engine, prunes the netlist by identifying violations, making the flow lightweight and efficient. At the block level, Twopass and Paradigm were used as ECO tools to converge the design. SSIR worked closely with Cadence field and R&D groups to tailor the flow, creating a recipe that significantly improves fix rates while preserving timing, logical DRCs, and legalization.
Event Type
Engineering Poster
TimeWednesday, July 293:00pm - 4:00pm PDT
LocationDAC Pavilion, Exhibit Floor
