Presentation
Fully Automated On‑Chip Inductor Synthesis for High‑Frequency VCO with ML Based Optimization Flow
DescriptionDesigning passive components for RF and high-speed ICs at advanced nodes presents significant challenges: manual layout creation, complex DRC compliance, fragmented flows, and limited early accuracy due to lumped models. These issues lead to long iterations, manual S-parameter handling, and increased risk of silicon re-spins.
EMX Designer addresses these challenges with an integrated, automated solution inside Cadence Virtuoso and ADE. It synthesizes DRC-clean parametric cells for inductors using scalable models, meeting electrical targets such as inductance, Q-factor, SRF, and bandwidth. Analysis mode leverages EMX Solver for full electromagnetic accuracy, enabling fine-tuning of all physical parameters such as (shield, dummy fill and isolation ring) and attaching per-instance S-parameters seamlessly.
Further, EM-in-the-loop optimization through ADE's Advanced Optimization Platform (AOP) with machine learning (Neuron) delivers multi-parameter optimization directly in the design environment. This capability accelerates convergence, explores design space efficiently, and ensures golden EM accuracy without leaving Virtuoso.
By automating synthesis, analysis, testbench setup, and optimization, EMX Designer reduces turnaround from days to hours, improves productivity, and guarantees first-pass silicon success. Its combination of speed, accuracy, and flexibility empowers designers to meet aggressive performance targets at advanced nodes with 10X productivity gain.
EMX Designer addresses these challenges with an integrated, automated solution inside Cadence Virtuoso and ADE. It synthesizes DRC-clean parametric cells for inductors using scalable models, meeting electrical targets such as inductance, Q-factor, SRF, and bandwidth. Analysis mode leverages EMX Solver for full electromagnetic accuracy, enabling fine-tuning of all physical parameters such as (shield, dummy fill and isolation ring) and attaching per-instance S-parameters seamlessly.
Further, EM-in-the-loop optimization through ADE's Advanced Optimization Platform (AOP) with machine learning (Neuron) delivers multi-parameter optimization directly in the design environment. This capability accelerates convergence, explores design space efficiently, and ensures golden EM accuracy without leaving Virtuoso.
By automating synthesis, analysis, testbench setup, and optimization, EMX Designer reduces turnaround from days to hours, improves productivity, and guarantees first-pass silicon success. Its combination of speed, accuracy, and flexibility empowers designers to meet aggressive performance targets at advanced nodes with 10X productivity gain.
Event Type
Engineering Poster
TimeTuesday, July 285:00pm - 6:00pm PDT
LocationDAC Pavilion, Exhibit Floor