Presentation
Unifying Pre- and Post-Silicon Software Validation Through Modeling
DescriptionAs software complexity increases in modern SoC development, effective pre-silicon software validation has become critical. Although software development is performed early in the design flow, conventional emulation environments remain limited in realism, configurability, and performance, restricting their ability to capture silicon-relevant behavior.
This work introduces a pre-silicon software validation framework that addresses fundamental limitations of conventional hybrid emulation by combining a camera sensor model (CSM) with a new-generation emulator featuring multi-port memory support. The framework is implemented on the StratoCS emulator.
The sensor model enables high-fidelity camera behavioral validation by providing image data that closely reflects real hardware behavior in a hybrid emulation environment. To efficiently support high-resolution camera workloads, a high-bandwidth multi-port hybrid memory architecture is employed, enabling data transfer rates that approximate real sensor throughput while preserving functional correctness. In addition, virtual I2C enables user-driven runtime control of the sensor model, improving configurability and extending the practical applicability of sensor-based validation.
As a result, realistic validation can be performed earlier, allowing post-silicon efforts to focus on issue resolution as well as power and performance optimization. By overcoming conventional emulation limitations, the proposed framework establishes emulation as a practical platform for user-driven, DMA-intensive pre-silicon software validation.
This work introduces a pre-silicon software validation framework that addresses fundamental limitations of conventional hybrid emulation by combining a camera sensor model (CSM) with a new-generation emulator featuring multi-port memory support. The framework is implemented on the StratoCS emulator.
The sensor model enables high-fidelity camera behavioral validation by providing image data that closely reflects real hardware behavior in a hybrid emulation environment. To efficiently support high-resolution camera workloads, a high-bandwidth multi-port hybrid memory architecture is employed, enabling data transfer rates that approximate real sensor throughput while preserving functional correctness. In addition, virtual I2C enables user-driven runtime control of the sensor model, improving configurability and extending the practical applicability of sensor-based validation.
As a result, realistic validation can be performed earlier, allowing post-silicon efforts to focus on issue resolution as well as power and performance optimization. By overcoming conventional emulation limitations, the proposed framework establishes emulation as a practical platform for user-driven, DMA-intensive pre-silicon software validation.
Event Type
Engineering Poster
Engineering Presentation
TimeMonday, July 275:00pm - 6:00pm PDT
LocationDAC Pavilion, Exhibit Floor
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