Presentation
OoB Generator: A Novel Method to Improve the Productivity of RTL-to-Layout Using Python
DescriptionIn analog-on-top devices featuring hundreds of digital test and trimming registers, routing complexity between the digital domain and analog IPs leads to high congestion. STMicroelectronics' patented solution No. US20250371237A1 relocates these registers inside the analog IP blocks, significantly reducing top-level interconnections. However, this requires executing the full digital design flow (from RTL generation to Place & Route) for each analog "box," increasing time and the risk of errors. To address this, the "OoB (Out-of-Box) Generator," a Python-based tool, was developed to fully automate the digital flow, integrating RTL generation, simulation, synthesis, Place & Route, and signoff through an intuitive GUI. This tool reduces development time from 3 days to 30 minutes per box, achieving a 17% improvement in logic density (kgates/mm²) and a 30% reduction in trim/test nets. OoB Generator also empowers analog designers to independently manage the digital flow, enhancing productivity and design quality. The approach has been silicon-validated and adopted in commercial products, with future plans to extend support to additional IPs and integrate AI for design decision assistance.
Event Type
Engineering Poster
TimeMonday, July 275:00pm - 6:00pm PDT
LocationDAC Pavilion, Exhibit Floor
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