Presentation
Novel Methodology to Replace Openaccess Inputs for Hierarchical Chip Construction
DescriptionState-of-the-art microprocessors become more complex with every generation. Therefore, large microprocessor designs are implemented hierarchically. For Physical Design this means smaller building blocks are being processed from RTL to GDS first. Following, these pre-built blocks can be integrated at higher levels with a final chip-wide place and route as well as checking being done at the end. This process requires a precise handoff which for shapes is represented in form of a physical abstract. In the past, abstracts were created upfront on a higher level to include in-context information and were published as OpenAccess data to be used as inputs for block construction. However, this process is very time consuming, error prone and adds extra dependencies. The IBM z-Microprocessor team has created a methodology where the OpenAccess views are being replaced by version-controlled text files. Generation of these text files is automated, depends on the latest RTL as well as the latest parent level state of the design and runs independent of other processes. This simplifies the hierarchical end-to-end pipeline from RTL to GDS because block specific OA-abstracts, required for construction, are generated on-the-fly. This not only saves runtime but also increases the overall stability of the design.
Event Type
Engineering Poster
TimeTuesday, July 285:00pm - 6:00pm PDT
LocationDAC Pavilion, Exhibit Floor