Presentation
Reasoning Engine for Silicon Verification
DescriptionVerification is hard, and it consumes an outsized share of silicon schedule and budget. VerifAgent is an agentic AI platform for accelerating UVM-based functional verification of digital IPs. Given an IP's micro-architecture specification and partial RTL, VerifAgent can generate a comprehensive test plan and implement full UVM test bench and test cases. It can compress the verification cycle by a factor of seven and reduce engineering cost by more than 85%. Our Multi-AI-Agent Orchestration Methodology produces high-quality code, and the EDA-in-the-loop approach ensures the generated code is always compile clean. Deployed at 10+ chip companies, we have helped our customers save thousands of hours and millions of dollars over the past 6 months.
Presenter
Event Type
Exhibitor Forum
TimeMonday, July 274:00pm - 5:00pm PDT
LocationExhibitor Forum, Exhibit Floor