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Dalian Maritime University
Presentations
Research Manuscript
Are They All Safe? Practical Fault Injection Attacks on FPGA Logic Synthesis Tools
4:30pm - 4:42pm PDT Wednesday, July 29 Mtg Room 202C
Security
SEC2. Hardware Security: Primitives, Architecture, Design & Test
Research Manuscript
Learning-Based Slack-Aware Timing-Driven Global Placement for Large-Scale Heterogeneous FPGAs
3:54pm - 4:06pm PDT Wednesday, July 29 Mtg Room 202AB
EDA
EDA7-I. Physical Design and Verification
Research Manuscript
RL4HDL: Code Diversity Guided FPGA Logic Synthesis Compiler Testing Via Reinforcement Learning
3:56pm - 4:10pm PDT Tuesday, July 28 Mtg Room 201B
EDA
EDA5. RTL/Logic Level and High-level Synthesis
Contributors
Shikai Guo
Hui Li
Jiaxin Li
Qian Ma
Zhihao Xu
Hui Zeng
Furui Zhan