Close

Organization

<
Shanghai LEDA Technology Co., Ltd
Presentations
Research Manuscript
DRCA: Reliable Bitwise Logic in DRAM via Dual-Rail Compute and Access
12:16pm - 12:30pm PDT Monday, July 27 Mtg Room 203AB
Design
DES2A. In-memory and Near-memory Computing Circuits
Research Manuscript
TOB-Sched: Topological Order Balancing-Driven Static Scheduling for Processor-Based Emulation
4:30pm - 4:42pm PDT Monday, July 27 Mtg Room 201B
EDA
EDA2. Design Verification and Validation
Contributors
Jing Tang
Shuo Yan