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Fuzhou University
Presentations
Research Manuscript
AccDRC: FPGA Acceleration for VLSI DRC with Cell-Aware Layout Partitioning
5:18pm - 5:30pm PDT Monday, July 27 Mtg Room 201B
EDA
EDA2. Design Verification and Validation
Research Manuscript
Analytically-Derived Hybrid Net–pin Weighting for Timing-Driven Global Placement
4:42pm - 4:54pm PDT Wednesday, July 29 Mtg Room 202AB
EDA
EDA7-I. Physical Design and Verification
Research Manuscript
FLASH3D: A Fast Layered Analytical Solver for High-Accuracy Steady-State Thermal Simulation of 3D ICs
5:18pm - 5:30pm PDT Monday, July 27 Mtg Room 202AB
EDA
EDA4. Power Analysis and Optimization
Late Breaking Results
Late Breaking Results: A Fully Differentiable Rectilinear Minimum Spanning Tree Wirelength Model for Global Placement
6:30pm - 6:34pm PDT Monday, July 27 Exhibit Hall
Research Manuscript
LRTA: Routability-Driven 3D-Aware Track Assignment with Layer Reassignment
4:54pm - 5:06pm PDT Tuesday, July 28 Mtg Room 202AB
EDA
EDA7-I. Physical Design and Verification
Research Manuscript
ODBP: Obfuscation Design Approach for Biochemical Protocols in Continuous-Flow Microfluidic Biochips
1:42pm - 1:55pm PDT Tuesday, July 28 Mtg Room 202C
Design
DES3. Emerging Models of Computation
Research Manuscript
Rectilinear Soft Module Floorplanning via Differentiable Polygon Shaping Model and Flow-Based Legalization
4:06pm - 4:18pm PDT Tuesday, July 28 Mtg Room 203AB
EDA
EDA7-II. Physical Design and Verification
Research Manuscript
Timing-Driven Scheduling and Placement Under Pressure-Path Interference for Fully Programmable Valve Array Biochips
2:47pm - 3:00pm PDT Tuesday, July 28 Mtg Room 202C
Design
DES3. Emerging Models of Computation
Contributors
Hao Ai
Guangyong Chen
Zhisheng Chen
Zhisheng Chen
Pengcheng Huang
Junjin Li
Zepeng Li
Bowen Liu
Genggeng Liu
Youlin Pan
Jingyi Wang
Qiang Yang
Ruping Zhou
Wenxing Zhu
Yuhan Zhu