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University of Sheffield
Presentations
Research Manuscript
Breaking the Tuning Barrier: Zero-Hyperparameters Yield Multi-Corner Analysis Via Learned Priors
2:34pm - 2:47pm PDT Tuesday, July 28 Mtg Room 101B
EDA
EDA8. Design for Manufacturability and Reliability
Research Manuscript
Exploiting Function-Family Structure in Analog Circuit Optimization
5:06pm - 5:18pm PDT Wednesday, July 29 Mtg Room 101B
EDA
EDA6. Analog CAD, Simulation, Verification and Test
Research Manuscript
From Fluid Dynamics to Chip Design: PDE Foundation Model Address Data Bottleneck in 3D-ICs Thermal Simulation
12:16pm - 12:30pm PDT Monday, July 27 Mtg Room 101A
AI
AI1. AI/ML Frontiers for Hardware Design
Research Manuscript
IGNITE: An Inquisitive and Graph-Aware Neural Circuit Simulator with Two-Stage Enhanced In-Context Learning
1:30pm - 1:42pm PDT Monday, July 27 Mtg Room 202AB
EDA
EDA6. Analog CAD, Simulation, Verification and Test
Research Manuscript
Legotherm: Modular and Reusable Thermal Model for Chiplet-Based Heterogeneous Integration
5:06pm - 5:18pm PDT Monday, July 27 Mtg Room 202AB
EDA
EDA4. Power Analysis and Optimization
Research Manuscript
OpenACMv2: An Accuracy-Constrained Co-Optimization Framework for Approximate DCiM
4:54pm - 5:06pm PDT Wednesday, July 29 Mtg Room 101B
EDA
EDA6. Analog CAD, Simulation, Verification and Test
Research Manuscript
PIANO: Physics-Informed Admittance Neural Operator for Fast Power Integrity Analysis
4:06pm - 4:18pm PDT Monday, July 27 Mtg Room 202AB
EDA
EDA4. Power Analysis and Optimization
Research Manuscript
Powerpath: Internal-Probe-Free Search Interval Reduction for Efficient Statistical Sequential Constraint Characterization
11:10am - 11:23am PDT Monday, July 27 Mtg Room 202AB
EDA
EDA3. Timing Analysis and Optimization
Research Manuscript
Seeing Through Silicon: Multimodal Thermal Reconstruction via Physics-Informed Diffusion
1:55pm - 2:08pm PDT Monday, July 27 Mtg Room 201B
Chiplet
EDA
EDA1. Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package
Research Manuscript
Stochastic Diffusion Prior: Knowledge Elicitation and Local Adaptation for Transistor Sizing
4:42pm - 4:54pm PDT Wednesday, July 29 Mtg Room 101B
EDA
EDA6. Analog CAD, Simulation, Verification and Test
Engineering Poster
Xchip: A Guardrailed Agentic Gen-AI Front-End Flow from Intent to GDSII
5:00pm - 6:00pm PDT Tuesday, July 28 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Sessions
Research Manuscript
RM Poster Session Two
3:00pm - 3:30pm PDT Monday, July 27
Chiplet
SYS4. Embedded System Design Tools and Methodologies
EDA
EDA1. Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package; Design
DES3. Emerging Models of Computation; AI
AI3-I. AI/ML Application and Infrastructure; EDA
EDA6. Analog CAD
Simulation
Verification and Test; Design
DES2B-I. In-memory and Near-memory Computing Architectures
Applications and Systems; AI
AI2-I. AI/ML Algorithms and Models; Systems
Research Manuscript
RM Poster Session Five
3:00pm - 3:30pm PDT Tuesday, July 28
Quantum
DES3. Emerging Models of Computation
EDA
EDA8. Design for Manufacturability and Reliability; Design
DES6. Quantum Computing; Chiplet
EDA1. Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package; Systems
SYS5. Embedded Memory and Storage Systems; AI
AI3-II. AI/ML Application and Infrastructure; Design
Contributors
Charith Abhayaratne
Tiantai Deng
John Goodenough
Wei Xing
Kaiyuan Yang
Session Chairs
Wei W. Xing