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Organization

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National ASIC Center, School of Integrate Circuits, Southeast University
Presentations
Research Manuscript
ChatSVA: Bridging SVA Generation for Hardware Verification via Task-Specific LLMs
3:30pm - 3:42pm PDT Monday, July 27 Mtg Room 101A
AI
AI1. AI/ML Frontiers for Hardware Design
Research Manuscript
Chipmodeler: LLM-Aided Reference Model Design for Agile Hardware Verification
5:18pm - 5:30pm PDT Monday, July 27 Mtg Room 101A
AI
AI1. AI/ML Frontiers for Hardware Design
Contributors
Lik Tung Fu