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Nanjing University of Posts and Telecommunications
Presentations
Research Manuscript
Leveraging AI-Inspired Hardware Architecture to Enhance LPN Acceleration in Post-Quantum Cryptography
3:30pm - 3:42pm PDT Wednesday, July 29 Mtg Room 202C
Security
SEC2. Hardware Security: Primitives, Architecture, Design & Test
Research Manuscript
Toward True-3D Timing-Driven Analytical Global Placement for Mixed-Size Face-to-Face 3D ICs
4:18pm - 4:30pm PDT Wednesday, July 29 Mtg Room 202AB
EDA
EDA7-I. Physical Design and Verification
Research Manuscript
Unveiling the Security Risks Driven by the Hardware Interrupts
5:18pm - 5:30pm PDT Tuesday, July 28 Mtg Room 203C
Security
SEC2. Hardware Security: Primitives, Architecture, Design & Test
Contributors
Xiqiong Bai
Yingxue Gao
Jiliang Zhang