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Intel
Presentations
Engineering Poster
A Simple and Predictable Solution for Early Full-Chip LVS Convergence
5:00pm - 6:00pm PDT Tuesday, July 28 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Engineering Presentation
A Unified QA Framework for Intel Library Validation Using Siemens Solido Crosscheck
2:30pm - 2:45pm PDT Monday, July 27 Seaside Ballroom B
AI
Design
EDA
Engineering Poster
AI-Accelerated Signoff Verification and Glitch Analysis for Single and Multibit Level Shifters
3:00pm - 4:00pm PDT Wednesday, July 29 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Engineering Presentation
AI-Enhanced Early Thermal Aware Module Placement for 3DIC PPA Optimization
11:45am - 12:00pm PDT Monday, July 27 Seaside RM 7
Chiplet
EDA
Research Manuscript
ATLAS: AI-Assisted Threat-to-Assertion Learning for System-on-Chip Security Verification
5:06pm - 5:18pm PDT Wednesday, July 29 Mtg Room 202C
Security
SEC2. Hardware Security: Primitives, Architecture, Design & Test
Engineering Poster
Bridging Hardware-Software Abstraction In UVM Verification
5:00pm - 6:00pm PDT Monday, July 27 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Engineering Poster Gladiator
BSPDN: A Power Delivery Architecture for 19.8% Core Power Reduction and 9.3C Thermal Mitigation in Next-Generation AI Processors
5:00pm - 5:08pm PDT Tuesday, July 28 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Tutorial
Energy-Efficient Edge AI and Autonomy
9:00am - 12:30pm PDT Sunday, July 26 Mtg Room 202AB
Engineering Poster
ENHANCED AUTOMATION FOR GENERATING LOGIC-OPTIMIZATION ECOs (EAGLE) IN SIGNOFF
3:00pm - 4:00pm PDT Wednesday, July 29 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Engineering Poster
Formal Verification Engineering for Integer Vector Neural Network Instructions
3:00pm - 4:00pm PDT Wednesday, July 29 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
SKYTalk
From Silicon to Systems: Heterogeneous Integration as the Engine of AI Performance
12:15pm - 1:00pm PDT Monday, July 27 DAC Pavilion, Exhibit Floor
Systems
Engineering Presentation
Hardening Security of HW IPs by Verifying Their Negative Space Formally
3:30pm - 3:45pm PDT Tuesday, July 28 Seaside Ballroom A
Design
EDA
Engineering Poster
Isolated Lightning Rod Diode Structure for Process-Induced Discharge (PID) Dissipation to Reduce Leakage on Integrated Passive Device (IPD)
3:00pm - 4:00pm PDT Wednesday, July 29 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Late Breaking Results
Late Breaking Results: Power Mesh Construction for 3D-IC with Backside Power Delivery
6:27pm - 6:30pm PDT Monday, July 27 Exhibit Hall
Research Manuscript
Light-Bound Transformers: Hardware-Anchored Robustness for Silicon-Photonic Computer Vision Systems
12:16pm - 12:30pm PDT Tuesday, July 28 Mtg Room 101B
AI
AI5-II. AI/ML System and Platform Design
Engineering Poster
New Thermal Analysis Workflow for 3DIC Designs
3:00pm - 4:00pm PDT Wednesday, July 29 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Engineering Poster
Next-Generation 3DIC STCO: AI-Enabled PPA and Cost Optimization Through IEEE P3537 3Dblox
5:00pm - 6:00pm PDT Monday, July 27 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Engineering Presentation
Past Present and Future of CDC & RDC Glitches: Improved Glitch Checker (IGC)
11:30am - 11:45am PDT Wednesday, July 29 Seaside Ballroom A
EDA
Security
Engineering Presentation
Taming the Beast: A Formal Verification Approach to Solve Design Complexity- GPU Compression Block Case Study
4:15pm - 4:30pm PDT Tuesday, July 28 Seaside Ballroom A
Design
EDA
Engineering Special Session
The Heterogeneous Future of Agentic AGI: Challenges and Opportunities!
1:30pm - 3:00pm PDT Monday, July 27 Seaside Ballroom A
AI
EDA
Engineering Poster
The Pursuit of Golden Specification: Leveraging Architecture Formal
3:00pm - 4:00pm PDT Wednesday, July 29 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Research Manuscript
Think Before You Prune: Self-Reflective Structured Pruning for Reasoning Language Models
4:42pm - 4:54pm PDT Tuesday, July 28 Mtg Room 101A
AI
AI2-II. AI/ML Algorithms and Models
Engineering Poster
User Definable Custom Primitives in 3DIC AI-Driven STCO: Case Study on Power Grid Optimization for IR Enhancement
5:00pm - 6:00pm PDT Tuesday, July 28 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Sessions
Engineering Presentation
Precision in Practice: Advanced Verification Techniques for Modern Silicon
10:30am - 12:00pm PDT Monday, July 27 Seaside Ballroom A
EDA
Engineering Presentation
Formal Verification: Prove It. Don’t Hope It.
3:30pm - 5:00pm PDT Tuesday, July 28 Seaside Ballroom A
Design
EDA
Engineering Special Session
Advancements in Emulation and Prototyping for Semiconductor: Hardware Tools, Challenges, and FPGA Solutions
3:30pm - 5:00pm PDT Tuesday, July 28 Seaside RM 7
AI
Chiplet
EDA
Systems
Engineering Presentation
Pre-Silicon Hardware Security: Side-Channels and Edge AI
10:30am - 12:00pm PDT Wednesday, July 29 Seaside Ballroom B
Design
EDA
Security
Systems
Research Manuscript
RM Poster Session Nine
5:30pm - 6:00pm PDT Wednesday, July 29
Systems
EDA6. Analog CAD
Simulation
Verification and Test; Design
DES1-I. SoC
Heterogeneous
and Reconfigurable Architectures; AI
AI2-II. AI/ML Algorithms and Models; EDA
EDA7-I. Physical Design and Verification; AI
SEC2. Hardware Security: Primitives
Architecture
SYS5. Embedded Memory and Storage Systems; EDA
AI5-II. AI/ML System and Platform Design; Security
Design & Test
Contributors
Usha Rani Bagadi
Kohinoor Basu
Chandrakanth Betageri
Mohammad Bidmeshki
Naveen Bishnoi
Raghu BM
Vishnu Chandrakar
Yi-Wei Chen
Kurt Chu
Rahul Dabur
Ravidas Damodaran
Shamika Dolas
Ketavanya Dubakula
Jason Fung
Ramya Hariharan
Bo-Yuan Huang
Dean Huang
Lalitha Immaneni
Sachin Jain
Siddhant Paresh Jape
Roope Kaivola
Rakesh Kandula
Arun Kanuparthi
Max Korbel
Nitish Kumar
Souvik Kundu
Kuan-Ting Kuo
Ping Lim
Chia-Yi Liou
Chien-Pang Lu
Pratik Mahajan
Pietro Mercati
Jebin Mohandas
Mehdi Mohtashemi
Hareharan Nagarajan
Ramy Nashed Bassely Said
Nicholas Neal
Anantakrishnan NS
Sadha Parasuraman
Chung-Ching Peng
Kaladhar Radhakrishnan
Arnab Raha
Arnab Raha
Vivek Rajan
Jaideep Ramachandran
Namita Rawat
Sayak Ray
Tayib Samu
Bhukya Sardar
Satish Sethuraman
Jagat Shakya
Bathri Narayanan Subramanian
Satish Surana
Vivek Tiwari
Jonathan Valamehr
Kumaresan Vallinayagam
Bhaskar Vedula
James Waldemer
Jianyong Xie
Chih-Hsiang Yang
Jim Yang
Shu-ping Yeh
Guang Yong
Session Chairs
Usha Rani Bagadi
Chandrakanth Betageri
Rosario Cammarota
Bhaskar Vedula