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Real Intent
Presentations
Engineering Poster
INTENT-AWARE RDC ANALYSIS USING MINIMALLY BOOLEAN REASONING
3:00pm - 4:00pm PDT Wednesday, July 29 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Work in Progress
Linearly Scalable Algorithms for DFT Static Verification, Coverage Analysis, and Debug at RTL
5:14pm - 5:15pm PDT Monday, July 27 Exhibit Hall
Contributors
Kanad Chakraborty
Alok Mehrotra
Vikas Sachdeva