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Organization

Microchip
Presentations
Engineering Poster
A Hierarchical and Scalable Power Supply Network (PSN) Analysis Framework for FCBGA Packages in High-Power AI Applications
4:00pm - 4:15pm PDT Monday, July 27 Seaside Ballroom A
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Engineering Special Session
AI and Multi‑die: A Reinforcing Cycle
10:30am - 12:00pm PDT Wednesday, July 29 Seaside RM 7
AI
Chiplet
Design
EDA
Engineering Poster
An Optimized Full-Chip Analog Mixed-Signal (AMS) Verification Approach for PVT Calibration in FPGA Systems
5:00pm - 6:00pm PDT Tuesday, July 28 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Engineering Poster
Comprehensive SoC Power System Verification Using Optimized Mixed-Signal Verification Methodology
3:00pm - 4:00pm PDT Wednesday, July 29 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems
Engineering Presentation
Modeling and Optimization of Power MOSFET Device Layouts with Optislang Tool
2:30pm - 2:45pm PDT Tuesday, July 28 Seaside RM 7
Design
EDA
Contributors
Ahmed Abdellatif
Shubhi Agrawal
Mandar Deshpande
Claudia Dumitrescu
Zakir Hussain
Ramteja Kothamasu
Sathish R
Anu Ramamurthy
Prajjwal Soni
Yuming Tao
Shibin Velluva