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Peng Cheng Laboratory
Presentations
Research Manuscript
Celestialeye: A Synergistic CPU-FPGA Engine for Accurate Frequency Measurement in High-Speed Data Streams
4:54pm - 5:06pm PDT Tuesday, July 28 Mtg Room 202C
Design
DES1-I. SoC, Heterogeneous, and Reconfigurable Architectures
Research Manuscript
DiffDEG: Diffusion-Enhanced Design Evolution Graph Representation Learning for Post-Layout Optimization
1:42pm - 1:55pm PDT Tuesday, July 28 Mtg Room 101A
AI
AI3-II. AI/ML Application and Infrastructure
Research Manuscript
iPCL-M: Pre-Training of Chip Layout for Metrics Evaluation and Optimization
11:36am - 11:50am PDT Monday, July 27 Mtg Room 202AB
EDA
EDA3. Timing Analysis and Optimization
Contributors
Wenjun Li
Xingquan Li